The use of such temporarily assignable markers and registers is well known per se. Reference in this connection may be made, for example, to U.S. Pat. Nos. 3,328,534 and 3,524,934. In these conventional systems, especially those operating electronically rather than electromechanically, it is generally necessary to store several or possibly all of the digits making up a call number before the marker is summoned. Such call numbers usually include upwards of seven digits, depending on whether local, intercity or international communications are involved. This deferred engagement of the marker delays the establishment of a connection to the desired remote junction from which the call is extended to the desired party.
In our copending application Ser. No. 626,875 of even date, whose disclosure is hereby incorporated by reference into the present description, we have described a marker for the control of the aforementioned switch means co-operating with a register designed to store at least the characteristic portion of a call number upon being engaged by a calling line, this marker including a first memory connected to the register and a second memory addressable from the first memory via a decoder in order to read out operating instructions for a circuit controlling the operation of the switch means. The first memory is provided with a multiplicity of first cells addressable by respective digits and digit combinations stored in the register, each of these first cells containing a code word falling into one of several categories. The first of these categories encompasses the contents of cells addressed by digits or digit combinations completely identifying a remote junction; a second category encompasses the contents of cells addressed by digits or digit combinations with incomplete junction identifications. Advantageously, there is also a third category for the contents of cells addressed by digits or digit combinations identifying nonexisting junctions. Code words in the first category result in the energization of a first decoder output by an identification signal which addresses one of a multiplicity of second cells in the second memory, according to the characteristic portion received by the first memory. A code word in the second category energizes a second decoder output to generate a request signal which is fed back to the register for calling forth a further digit. A third decoder output may be energized by a code word in the third category to emit a busy signal.